Very thin chips, e.g. chips having a thickness of less than 100 μm are challenging to handle due to their size. Presently, electronic circuits are manufactured at wafer level, e.g. front end processes may be carried out on a wafer. The wafer which may have at least a specified thickness, and depending on diameter, may be handled with a costly carrier system. Following which, thinning may be carried out and solder material may be provided on the wafer backside. Presently, during production of electronic components, e.g. power electronics, thin chips may be provided with back side metallization and may require a special sawing process.
The thin chips, with backside metallization must be singulated, e.g. individualized. The thin chips may be subsequently placed on an interposer in a serial pick and place process, and soldered under high pressure and temperature. The thin chips may be soldered onto the interposer with inert gas at extremely high temperatures, e.g. temperatures greater than 300° C. Soldering very thin chips therefore places limits on through-put and places high stress, e.g. high pressure and high temperatures, on the thin chips.
Current methods, e.g. current production and/or manufacturing methods introduce a large expenditure into the chip handling and place limits on the size of the carrier due to bending and/or deflection, as wafers become thinner. The carrier system may limit the processing temperature of further back side processing such as soldering, curing or any other re-flow processes. The thin wafers, e.g. thin silicon wafers must be sawed with thick metal on the back side. Furthermore, thin chips need to be picked from the sawing foil and using an ultra violet UV foil may be necessary. High costs and yield loss may be incurred through the processing of thin wafers and chips, e.g. back side metallization, sawing, die bonding, etc from extremely thin wafers and chips.